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MAX2828/MAX2829
Single-/Dual-Band 802.11a/b/g
World-Band Transceiver ICs
Table 11. Integer-Divider Ratio Register
(A3:A0 = 0011)
Standby Register Definition (A3:A0 = 0010)
Various internal blocks can be turned on or off using
the standby register (in standby mode, see Table 10).
DATA BIT DEFAULT
D13 1
D12 1
DESCRIPTION
2 LSBs of the Fractional-Divider Ratio
Setting a bit to 1 turns the block on, while setting a bit
to 0 turns the block off.
Integer-Divider Ratio Register Definition
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
1
0
1
0
0
0
1
0
Set to 0
Integer-Divider Ratio Word
Programming Bits. Valid values are
from 128 (D7:D0 = 10000000) to 255
(D7:D0 = 11111111).
(A3:A0 = 0011)
This register contains the integer portion of the divider
ratio of the synthesizer. This register, in conjunction with
the fractional-divider ratio register, permits selection of a
precise frequency. The main synthesizer divide ratio is
an 8-bit value for the integer portion (see Table 11). Valid
values for this register are from 128 to 255 (D7 – D0). The
default value is 210. D13 and D12 are reserved for the 2
LSBs of the fractional-divider ratio.
Fractional-Divider Ratio Register Definition
(A3:A0 = 0100)
This register (along with D13 and D12 of the integer-
divider ratio register) controls the fractional-divider ratio
with 16-bit resolution. D13 to D0 of this register com-
bined with D13 and D12 of the integer-divider ratio reg-
grammed. The interface can be programmed through
the 3-wire SPI/MICROWIRE ? -compatible serial port.
ister form the whole fractional-divider ratio (see Tables
12a and 12b).
On startup, it is recommended to reset all registers by
placing the device in SPI reset mode (Table 5).
MICROWIRE is a trademark of National Semiconductor Corp.
Table 12a. IEEE 802.11g Frequency Plan and Divider Ratio Programming Words
f RF
(MHz)
(f RF x 4/3) / 20MHz
(DIVIDER RATIO)
INTEGER-DIVIDER
RATIO
A3:A0 = 0011, D7:D0
FRACTIONAL-DIVIDER RATIO
A3:A0 = 0100, D13:D0 (hex)
A3:A0 = 0011, D13:D12 (hex)
2412
2417
2422
2427
2432
2437
(default)
2442
2447
2452
2457
2462
2467
2472
2484
160.8000
161.1333
161.4667
161.8000
162.1333
162.4667
162.8000
163.1333
163.4667
163.8000
164.1333
164.4667
164.8000
165.6000
1010 0000
1010 0001
1010 0001
1010 0001
1010 0010
1010 0010
1010 0010
1010 0011
1010 0011
1010 0011
1010 0100
1010 0100
1010 0100
1010 0101
3333
0888
1DDD
3333
0888
1DDD
3333
0888
1DDD
3333
0888
1DDD
3333
2666
00
10
11
00
10
11
00
10
11
00
10
11
00
01
32
Maxim Integrated
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